Many protocols are used to communicate information among digital devices. For example, various protocols and systems have been developed for communications among central processing units and associated chip sets, as well as with peripheral devices, such as network interface cards, storage adaptors, graphics cards, and other devices. One protocol which has been developed for transporting computer bus protocols is the Peripheral Component Interconnect Express (PCIe) protocol. The PCIe protocol provides for a high bandwidth, serialized, full-duplex, point-to-point data communication link that is generally used to connect central processing units (CPUs) and chipsets with peripheral devices, for example. The Peripheral Component Interconnect Special Interest Group (PCI-SIG) defines the specifications for compliance to the PCIe standards.
PCIe systems provide point-to-point full duplex data lanes, and a single link may comprise from 1 to 32 lanes, for example. The data rate on each lane is determined by the characteristics of that electrical connection. The connection characteristics are reflected in the PCIe specification and provide for data rates of 2.5 gigabits per second (Gb/s) per lane, PCIe Gen 2 provides data rates of 5.0 gigabits per second per lane, and PCI Gen 3 provides data rates of 8 gigabits per second per lane. In a typical computer system each slot carries one, two, four, eight, or sixteen lanes of data between a motherboard and an associated card, usually plugged into a socket on the motherboard. Additionally, PCIe has a provision for external cabling.
The PCIe system provides a set of supporting auxiliary signals, including a clock lane and signals for system control, such as reset, hot plug, and power management, in support of the data lanes. The PCIe system also incorporates a state machine that controls the state of the link, such as the data rate of the lanes, the link width, the power level of the link, and other factors.
Optical communication links are used in numerous technologies including Fibre Channel, InfiniBand, and 10 Gigabit Ethernet (10 GbE), to name a few. U.S. patent application Ser. No. 12/059,981 (the '981 application), filed May 8, 2008 (US Patent Publication Number US 2009/0279889 A1), describes systems and method for implementing the optical transport of PCIe protocol information over an optical link that is a bundle of optical fibers. The systems and methods of the '981 application include a PCIe interface that both transmits and receives data and auxiliary signals (also referred to as sideband signals) over an optical link. The interface receives PCIe data signals from a data processing unit and provides those data signals to an optical link for conversion (from electrical to optical signals) and transmission to a remote data processing unit or other similar apparatus. The system has N datapath lanes dedicated for transmission of data, and N datapath lanes dedicated for reception of data, where each transmission lane and each reception lane is coupled to a separate optical fiber. Additionally, as the PCIe protocol provides for the dedicated auxiliary signals and protocol used to communicate information required for PCIe optical link management, the interface includes a link controller that interfaces the auxiliary signals to the transceivers, which transport the auxiliary signals over the optical link using two dedicated fibers of the optical link. Consequently, while this technology provides for the transport of data and auxiliary signals over an optical link, the optical link is typically required to have some number (e.g., at least two) of optical fibers or channels dedicated to the transport of the auxiliary signals, in addition to the optical channels dedicated to data transport.
Another issue that arises when implementing particular protocols (e.g., PCIe, Serial Attached Small Computer System Interface (SCSI) (SAS), etc.) over optical links is that these protocols may use the absence of data on a channel to indicate a valid state of the protocol. Therefore, when the absence of data, referred to as electrical idle or quiet period, is used as a signaling protocol for exchanging information or for reducing power consumption, it becomes necessary for the optical system components to accurately transmit and receive this state. This can lead to issues in optical systems, however, because of typical optical system configurations. For example, the lower cutoff frequency inherent in an optical fiber channel leads to more noise energy being present on the channel in the absence of data. The increased channel noise energy is aggravated by the typical receiver amplifier gain configuration, which can increase the receiver gain during times when no data is being transmitted, and the insufficient automatic squelch speeds. The result is that the typical optical system, during electrical idle periods, amplifies and outputs the only signal present on the channel, random noise. Therefore, the implementation over an optical link of any protocol that relies on electrical idle or quiet periods dictates accurate electrical idle state detection and control.